Output buffer in case of BIS M-4008
Two buffers are needed to exchange data and commands between the processor unit and the controlling system (input buffer and output buffer). The buffer contents are exchanged using cyclical polling. The buffer content depends on the cycle in which it is written (e.g. control commands at the beginning of a job).
When writing to the buffer, the transmitted data from the preceding cycle is overwritten.
Unwritten bytes are not deleted and retain their data content.
The control commands are carried over to the identification system and those on the data carrier are carried over to written data through the output buffer.
Assignment and explanation:
After a R/W error the GR bit does not need to be set to place the R/W in the basic state. Each time a command (successful or with error) is carried out, the R/W head is in the basic state.